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MC10EPT20, MC100EPT20 3.3V LVTTL/LVCMOS to Differential LVPECL Translator
The MC10EPT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL (Positive ECL) levels are used, only +3.3 V and ground are required. The small outline SOIC-8 package and the single gate of the EPT20 makes it ideal for those applications where space, performance, and low power are at a premium. The 100 Series contains temperature compensation.
http://onsemi.com MARKING DIAGRAMS*
8 8 1 SO-8 D SUFFIX CASE 751 1 HPT20 ALYW 1 8 KPT20 ALYW
* 390 ps Typical Propagation Delay * Maximum Input Clock Frequency > 1 GHz Typical * Operating Range VCC = 3.0 V to 3.6 V * * *
with GND = 0 V PNP TTL Input for Minimal Loading Q Output will Default HIGH with Input Open Pb-Free Packages are Available
8 1 TSSOP-8 DT SUFFIX CASE 948R
8 HA20 ALYW 1
8 KA20 ALYW 1
H = MC10 K = MC100 A = Assembly Location
L = Wafer Lot Y = Year W = Work Week
*For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2004
1
September, 2004 - Rev. 7
Publication Order Number: MC10EPT20/D
MC10EPT20, MC100EPT20
Table 1. PIN DESCRIPTION
NC 1 8 VCC PIN Q, Q Q 2 LVTTL D 7 D VCC GND NC Q 3 LVPECL 6 NC FUNCTION Differential PECL Outputs LVTTL Input Positive Supply Ground No Connect
NC
4
5
GND
Figure 1. 8-Lead Pinout (Top View) and Logic Diagram
Table 2. ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Value N/A N/A > 1.5 kV > 200 V > 2 kV Level 1 UL 94 V-0 @ 0.125 in 150 Devices
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34
Table 3. MAXIMUM RATINGS
Symbol VCC VI Iout TA Tstg qJA qJC qJA qJC Tsol Power Supply Input Voltage Output Current Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm Standard Board <2 to 3 sec @ 248C SOIC-8 SOIC-8 SOIC-8 TSSOP-8 TSSOP-8 TSSOP-8 Parameter Condition 1 GND = 0 V GND = 0 V Continuous Surge VI VCC Condition 2 Rating 6 6 50 100 -40 to +85 -65 to +150 190 130 41 to 44 185 140 41 to 44 265 Unit V V mA mA C C C/W C/W C/W C/W C/W C/W C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
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MC10EPT20, MC100EPT20
Table 4. LVTTL INPUT DC CHARACTERISTICS VCC = 3.3 V, GND = 0 V, TA = -40C to +85C
Symbol IIH IIHH IIL VIK VIH VIL Characteristic Input HIGH Current (Vin = 2.7 V) Input HIGH Current MAX (Vin = 6.0 V) Input LOW Current (Vin = 0.5 V) Input Clamp Voltage (Iin = -18 mA) Input HIGH Voltage Input LOW Voltage 2.0 0.8 Min Typ Max 20 100 -0.6 -1.2 Unit mA mA mA V V V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.
Table 5. 10EPT PECL OUTPUT DC CHARACTERISTICS VCC = 3.3 V, GND = 0 V (Note 2)
-40C Symbol ICC VOH VOL Characteristic Positive Power Supply Current "HIGH" Output HIGH Voltage (Note 3) Output LOW Voltage (Note 3) Min 18 2165 1365 Typ 23 2290 1490 Max 28 2415 1615 Min 18 2230 1430 25C Typ 23 2355 1555 Max 28 2480 1680 Min 19 2290 1490 85C Typ 24 2415 1615 Max 29 2540 1740 Unit mA mV mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Output parameters vary 1:1 with VCC. 3. All loading with 50 W to VCC - 2.0 V.
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MC10EPT20, MC100EPT20
Table 6. 100EPT PECL OUTPUT DC CHARACTERISTICS VCC = 3.3 V, GND = 0 V (Note 4)
-40C Symbol ICC VOH VOL Characteristic Negative Power Supply Current Output HIGH Voltage (Note 5) Output LOW Voltage (Note 5) Min 20 2155 1355 Typ 25 2280 1480 Max 30 2405 1605 Min 22 2155 1355 25C Typ 27 2280 1480 Max 32 2405 1605 Min 23 2155 1355 85C Typ 28 2280 1480 Max 33 2405 1605 Unit mA mV mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Output parameters vary 1:1 with VCC. 5. All loading with 50 W to VCC - 2.0 V.
Table 7. AC CHARACTERISTICS VCC = 3.0 V to 3.6 V, GND = 0 V (Note 6)
-40C Symbol fmax tPLH, tPHL tSKEW tJITTER tr tf Characteristic Maximum Input Clock Frequency Propagation Delay to Output Differential Device-to-Device Skew (Note 7) RMS Random Clock Jitter Output Rise/Fall Times (20% - 80%) Q, Q 70 <1 100 280 Min Typ >1 350 430 150 <2 170 80 <1 120 300 Max Min 25C Typ >1 370 450 150 <2 180 90 <1 140 320 Max Min 85C Typ >1 400 490 170 <2 190 ps ps ps Max Unit GHz ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. Measured using a LVTTL source, 50% duty cycle clock source. All loading with 50 W to VCC - 2.0 V. 7. Skew is measured between outputs under identical transitions.
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MC10EPT20, MC100EPT20
900 800 OUTPUT VOLTAGE AMPLITUDE (mV) 700 600 500 400 300 200 100 0 9 RMS RANDOM CLOCK JITTER (ps) 8 7 6 5 4 3 2 1
EEEEEEEEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEEEEEEEEEE
(JITTER) 0 200 400 600 800 1000 1200 INPUT CLOCK FREQUENCY (MHz)
Figure 2. Output Voltage Amplitude (VOUTpp)/RMS Jitter vs. Input Clock Frequency at Ambient Temperature
Q Driver Device Q
Zo = 50 W
D Receiver Device
Zo = 50 W 50 W 50 W
D
VTT VTT = VCC - 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.)
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MC10EPT20, MC100EPT20
ORDERING INFORMATION
Device MC10EPT20D MC10EPT20DR2 MC10EPT20DT MC10EPT20DTR2 MC100EPT20D MC100EPT20DG MC100EPT20DR2 MC100EPT20DT MC100EPT20DTG MC100EPT20DTR2 Package SO-8 SO-8 TSSOP-8 TSSOP-8 SO-8 SO-8 (Pb-Free) SO-8 TSSOP-8 TSSOP-8 (Pb-Free) TSSOP-8 Shipping 98 Units / Rail 2500 / Tape & Reel 100 Units / Rail 2500 / Tape & Reel 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 100 Units / Rail 100 Units / Rail 2500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1642/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC10EPT20, MC100EPT20
PACKAGE DIMENSIONS
SOIC-8 NB D SUFFIX CASE 751-07 ISSUE AC
-X- A
8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060 7.0 0.275 4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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MC10EPT20, MC100EPT20
PACKAGE DIMENSIONS
TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A
8x
K REF 0.10 (0.004)
M
0.15 (0.006) T U
S 2X
TU
S
V
S
L/2
8
5
L
1 PIN 1 IDENT 4
B -U-
0.25 (0.010) M
0.15 (0.006) T U
S
A -V-
F DETAIL E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_
C 0.10 (0.004) -T- SEATING
PLANE
D
-W- G DETAIL E
DIM A B C D F G K L M
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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MC10EPT20/D

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